PCB Design: Layer Stacks in High Speed Designs – OnTrack

PCB Design: Layer Stacks in High Speed Designs – OnTrack

Hi my name is Chris Carlson. I’m one of the senior FAEs here at Altium and today I would like to discuss with you
engineering a layer stack up for high speed design. Now much has been written on this topic and I’m by no means going to be comprehensive but I would like to
show you a few of the features that you need to consider when developing your
layer stack up, again – for high speed design. Now here I have a typical six
layer stack up that it would be appropriate for high speed design. So
let’s look at some of the features of this. So the black lines represent
prepreg material, the blue lines are core material and the orange is obviously my
copper layers. I have two planes and four routing layers. Now for your high-speed
signals these need to be very tightly coupled to a plane layer so this core
material needs to be as thin as possible and we need to use core here because
this is going to be impedance driven so we need a very flat surface to guarantee
that we have consistent impedance down the length of our routed traces. Then our
outside layers are prepregged to the entire stack up. Now these are suitable for your
low speed type signals your analog signal processing and anything else it
does not have to be impedance driven then we use prepreg material at the
center of the stack up to build up the stack so that we have the appropriate
final thickness of our board generally 62 mils now when you’re developing a
layer stack up you need to work with your fabricator. You need to understand
the materials that they normally stock. I made this mistake one time, I engineered
a layer stack up without considering what they have on the shelf. They built
the board the way I specified but they had to special-order some of the
materials and it added significant cost to the overall board. Okay another thing
you need to consider are your via stacks. Now I’m looking at this layer stack up
this upper portion and this lower portion could be created as
sub assemblies these could be placed on a drill machine they could be drilled
and plated individually so we can use blind vias from the top layer down to
our first high-speed signal layer. However what about this layer once that
this has all been laminated with the prepreg material in the center that’s a
difficult layer to get to that’s going to have to be laser drilled and plated
adding significant cost to the overall design. So the most inexpensive way to
design this board would be to use through-hole vias. Now with your
through-hole vias those will go completely through the
layers stack and then we will bring out an annulus on each of our copper layers.
Now there’s a problem with this in that when we’re routing from a top layer to
our second signal layer we have this via stub left over here and the problem with
that is that adds parasitic capacitance to our signal. So if we were to draw a
single-ended signal here we would have parasitic capacitance to our AC ground
now this can be as much as a half a picofarad this value is obviously going to
be determined by the physical characteristics of our via that this can
really affect our signal integrity. So the approach we use when using
through-hole vias on high-speed design is we back drill this via barrel to
remove it. So we would take a drill that is slightly larger in diameter than the
via barrel and we would drill this material out now when you do this,
this isn’t adding a lot of extra technology to this in that we don’t
have to do any laser drilling to plate to vias that are difficult to get to we
simply use all through-hole vias most cost-effective approach and in back
drill those particular vias as necessary if you have questions about this topic
or have other topics you’d like to see us present, please leave your comments in the comment section below. I’m Chris Carlson thanks for your time. you

16 thoughts on “PCB Design: Layer Stacks in High Speed Designs – OnTrack

  1. cool video! I suppose that also back drill is not supported by any manufacture because the deepness must be well controlled.

  2. Nicely done. But it would be handy if you consider to tell people how to select the quantity of prepregs, why it is important to undestand what your minimum track width is, because i have seen PWBs with tracks like 0.08 mm, copper ring around via hole like 0.1 mm and 8-9 prepregs between cores. And that just didnot assemble, obviously.

  3. Just small complain: plase make the intro and outro music less loud. Now it forcing me to adjust the volume.

  4. How to calculate the trace impedance in the certain Layer? Say 8 layer stack. a trace has certain width at layer 7and has vias to layer 2 , layer 8

  5. I dont think manufacturers support back drilling. It requires also the thickness to be drilled after through hole process. If they do support it, the price will be astronomic I guess

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