49 thoughts on “RISC VS CISC – CPU architecture

  1. OOH my Goodness, can learning be like this. I slept in every video I watched for my computer architecture exam, but this video kept me awake and my comprehension level was optimum. Best educational video I've ever seen.

  2. Its fun watching it, its easier to understand this way and otherwise it would be boring, and thanks that I found a non hindi video of this haha.

  3. EPIC != RISC + CISC. It's Explicitly Parallel Instruction Computing, which is Intel's take on VLIW (Very Long Instruction Word) and used in the Itanium, a.k.a. the Itanic. Unfortunately, EPIC was a failure because it relied on the development of a compiler that was impossible to create. However in DSPs (digital signal processors), there is little branching, so VLIW works well there.

    Also, today's CISC CPUs use a front end to translate the complex instructions to micro ops, making them RISC processors internally.

  4. How do you explain PowerPC like on last gen consoles or Mac computers that are large and heat unfriendly? We're their coach counterparts not good till now?

  5. I really loved the way in which everything was explained! Lovely, entertaining and knowledgeable!

  6. ohh this is cool.. ๐Ÿ˜€ very sweet and diffrent level of thinking.. good luck&keep going (y)

  7. It was seriously Awesome…..i really loved the teaching style…..just to raise ur…voice….little higher tune….but overall epic vedio with full of knowledge

  8. Unfortunately for me , you didn't upload EPIC! WHY? This video was good, would love to see more from you!

  9. THANK YOU SO MUCH FOR VIDEO really I enjoy also when I look into your channel I found some videos about BTS
    FINALLY, I find A.R.M.Y with same my major
    I REALLY want to contact with u and get knowing u

  10. Aw man I was actually looking forward to the Pokemon battle ๐Ÿ™‚ Maybe develop the attacks on the actual differences between the two processors and then sort of animate those differences (say RISC uses Extreme-speed because of its size or CISC uses Heavy Slam due to its intensive nature for larger sets of instructions).

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